SCT DMA request 0 register
| DEV_00 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_01 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_02 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_03 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_04 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_05 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_06 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_07 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_08 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_09 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_010 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_011 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_012 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_013 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_014 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| DEV_015 | If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,…, event 15 = bit 15). |
| RESERVED | Reserved |
| DRL0 | A 1 in this bit makes the SCT set DMA request 0 when it loads the Match_L/Unified registers from the Reload_L/Unified registers. |
| DRQ0 | This read-only bit indicates the state of DMA Request 0 |